ultraembedded
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ultraembedded

@ultraembedded

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About

CPU designs, digital HW IP, emulation and embedded system projects

Location UK
Followers 1,543
Following 4
Public Repositories 71
Expertise

Skills & Technologies

C Verilog
GitHub Work

Projects & Repositories

Recent public projects and repositories from this profile.

FPGAmp

C

720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)

⭐ 304 Forks: 47
C View Project

core_ddr3_controller

Verilog

A DDR3 memory controller in Verilog for various FPGAs

⭐ 639 Forks: 111
Verilog View Project

biriscv

Verilog

32-bit Superscalar RISC-V CPU

⭐ 1314 Forks: 203
Verilog View Project

riscv

Verilog

RISC-V CPU Core (RV32IM)

⭐ 1799 Forks: 294
Verilog View Project

riscv_soc

Verilog

Basic RISC-V Test SoC

⭐ 212 Forks: 40
Verilog View Project

cores

Verilog

Various HDL (Verilog) IP Cores

⭐ 936 Forks: 238
Verilog View Project
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