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Greec
GitHub

Greec

@greec-d

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About

A highly driven Computer Engineering student with interest in embedded systems, electronics, and chip design and manufacturing.

Location Lebanon
Followers 0
Following 0
Public Repositories 2
Expertise

Skills & Technologies

Verilog
GitHub Work

Projects & Repositories

Recent public projects and repositories from this profile.

verilog-uart-transceiver

Verilog

8-N-1 UART transceiver in Verilog with 16x oversampling, TX/RX modules, and self-checking testbenches.

⭐ 0 Forks: 0

alu4bit

Verilog

No project description available.

⭐ 0 Forks: 0