dmrcmelis
@dmrcmelis
About
Hello, I'm Melis DEMIRCIOĞLU. I'm an Electronics and Communications Engineer. I'm adding my work in MATLAB and C#, Vivado.
Skills & Technologies
Projects & Repositories
Recent public projects and repositories from this profile.
RS232-receiver-in-VHDL
Implement the RS232 receiver using a finite state machine on FPGA side using VHDL.
3-bit-Binary-Counter-in-Vivado
Implement a 3-bit binary counter in VHDL.
IP-Core-Creation-Using-MATLAB
IP Core Creation Using MATLAB
ClassMethodDemo
C#No project description available.
decimation-filter-and-subsampling-in-Matlab
MATLAB'sinc^2 fourier transformation''Fourier Transform of sinc^2 sampled with M = 4''Decimatiion filter in spectral plane''filtered signal in spectral plane'
GameDemo
C#No project description available.